Here is a paper discussing a newly discovered form of non-linearity in CCD sensors that seems to affect a lot of professional astronomical CCD systems.
"A Binary Offset Effect in CCD Readout and Its Impact on Astronomical Data"
In short, the artifact seems to be introduced at the ADC stage and it adds a negative offset to a pixel's ADU value that is very strongly correlated to the number of ones in the binary representation of the ADU value of a few pixels earlier in the digitization process. I guess the way to think about it to 1st order it a "ghost-image" that is unfortunately highly non-linear wrt the original signal.
It would be interesting to see whether this is only visible in high quality, low-noise professional equipment. But as this seems to be a problem of the digitization step, I think it's not crazy to suspect that this could be observable in amateur equipment as well.
Hi Heinz-Bernd, yes, there are spurious coupling between digital electronics to very sensitive analog functions when they are mixed in systems. In electronics we know that very well and this is difficult to master in critical systems.
I have not read in much details the paper but it seems to me this is what call a "charge effect". The context of our CMOS DSLR electronics is very different. From what I saw they have non-fully integrated systems into monochip, it is more or less conventional electronics, not all CMOS apparently. In CMOS there are much less charge effect as 0 or 1 have about the same, much much lower, consumption. Then our present CMOS imagers are highly integrated in single chips, with full parallel processing at column level. Many in parallel. The integration into a single chip make it very reproducible. Next the way a CMOS is read is very different than CCD, each pixel is addressed directly without transfer throughout all the others pixels in a row.
But there are spurious coupling problems too ! Due to the way the processor and the digital electronics work there are near random digital signals that affect the very sensitive analog electronics in our DSLR. Both through galvanic or radiating coupling. The level is very low: about one or two ADU. This is very comparable to the classical static offset that is very low now in CMOS sensor (also 1 or 2 ADU). The spurious signals happen more or less like the static offset in a single image, but if you compare two images you see the change. This is really the limiting factor of the offset subtraction process we are now reaching as the static offset has reduced a lot. As it is pseudo-random there is little specific corrective process we could apply, we should just consider it being another noise source in addition to Nyquist-Johnson noise, shot noise and others. But in photometry its amplitude is very small, at ISO 200 it's one or two electrons against 100 electrons of shot noise if you target at typical 10000 level. Then we integrate number of pixels in the aperture and usually combine several images, I don't see this being a problem for us.
In imaging, when pushing the processing limits, those spurious signals are seen as moving / random strips across the images. It's possible to extract them by integration and subtract them. It works very well.
Clear Skies !
I see... Maybe it could be more of a problem to spectroscopy perhaps (ghost lines?). Anyway, I agree it's most likely not a big headache for us here, but I think it's an interesting effect and a bit surprising how many many different instruments of the pros are affected.
I have just skimmed the article, and am not sanguine about my ability to discern what is happening based on it. The first problem for me is that there is little discussion of the hardware and signal processing architectures used in the troubled chips (Note that the effect was found not to be universal).
It would be of interest to discover whether the affected chips came from the same manufacturer, or from the same designer. I suppose one could find that out by digging a little more deeply, since the faulty chips are identified.
Certainly, this particular defect is unlikely to be present in CMOS chips, because in CMOS every pixel has its own amplifier. While it is conceivable that a very strong signal in one pixel might introduce crosstalk in the nearest neighbors, the kind of effect described, where the crosstalk manifests itself several pixels away from the source, has to be unlikely in the extreme. And a crosstalk effect which depends upon the particular value of a given pixel's ADU output? Well, that is just about inconceivable in an architecture that is as massively parallel as CMOS.
I'm not so sure about this being different for CMOS. If I understood the paper correctly, the suspected cause is an instability of the reference voltage of the ADC, caused from coupling to the ADC's own output(!). I don't think it has anything to do with the amplifiers and I suspect (though Roger is much more of an expert here) that at this stage, CMOS and CCD are similar.
If you see the wide range of equipment affected (including the HST) one would suspect that this is not a single vendor problem....but yeah the paper is lacking a bit of information here.
Yes, what they report is a charge/load effect on the reference voltage of the ADC. I was not speaking about amplifiers as the possible cause of the effect they report. They show the reference of the used ADCs that are separated modules from several manufacturers, well known. It's obviousely conventional electronics, separated grabbers boards like 20 years ago, not single integrated chips. From the references they provide those systems are often 20 years old. Most recent (GMOS) have no problem. Present CMOS sensors technology is deeply evolving every year, not the same world...
What is surprising to me is that the effect is seen as an offset. If it's the reference voltage of the ADC it should be seen as an amplitude calibration variation. I would instead suspect a clamp problem, or some flotting bias.
In CMOS imager the situation is very different, the ADC(s) is part of the imager chip. Following the cases you can have several of them or even many, one at each pixel column. In Cmos technology there are much less charge problems as (as I already said) the consumption is extremely low and not depending of the bits status. They find it linked to bits status. The measurment is also done a different way in CMOS imagers with the correlated double sampling that is used to eliminate another specific issue of the CMOS photodiode reset. I think it should eliminate such offset / load effect if it exists.
Hi...as per my knowledge they have non-fully integrated systems into monochip, it is more or less conventional electronics, not all CMOS apparently. In CMOS there are much less charge effect as 0 or 1 have about the same, much much lower, consumption. Then our present CMOS imagers are highly integrated in single chips, with full parallel processing at column level.